1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device which is enhanced in accuracy of measuring length.
2. Description of the Related Art
When a semiconductor device is manufactured, various films are formed above a semiconductor substrate, and thereafter, a resist pattern is formed thereon. With the resist pattern as a mask, patterning of a film or ion-implantation is performed. Accordingly, dimensional accuracy of the resist pattern needs to be kept high.
Thus, in forming the resist pattern, a monitor pattern which is not used in forming a semiconductor integrated circuit is formed other than a circuit pattern, which is actually used in forming the semiconductor integrated circuit. In this case, arrangement and the like of the monitor pattern, which is not used in forming the semiconductor integrated circuit, is made as similar to the circuit pattern as possible so that if a variation occurs to the circuit pattern, the same variation as that also occurs to the monitor pattern. Accordingly, when a size of the monitor pattern is measured, a size, variation and the like of the circuit pattern can be grasped. The reason why the size of the circuit pattern is not measured is that shrinkage and deformation of the resist pattern occur on measurement as will be described later.
Such a monitor pattern is formed in a length measuring monitor region, which is secured in a scribe line or a chip.
For example, when a size of a resist pattern which is used in patterning a polysilicon film for forming a gate electrode is grasped, an element isolation region is formed in a region in which an integrated circuit is to be formed (not shown) by STI (shallow Trench Isolation) first, and an element isolation region 52 is also formed in a length measuring monitor region 51 outside it as shown in FIG. 8A. As a result, a plurality of active regions 53 are defined. Subsequently, as shown in FIG. 8B, after formation of a gate insulation film (not shown) and the like are performed, a polysilicon film is formed, and this is patterned by using the resist pattern, whereby polysilicon patterns 54 which are the same as gate electrodes are formed in the region where the integrated circuit is to be formed and the length measuring monitor region 51. At this time, the size of the resist pattern is measured before and after formation of the polysilicon pattern 54, whereby accuracy of the resist pattern and degree of trimming can be grasped.
When the formation is performed by repeating the same pattern as a SRAM, the element isolation region 52 is formed in the length measuring monitor region 51 and the active regions 53 are defined as shown in FIG. 9A. Thereafter, the polysilicon patterns 54 are formed as shown FIG. 9B. In this case, the dimension of the resist pattern is measured before and after formation of the polysilicon pattern 54, and thereby, accuracy of the resist pattern and degree of trimming can be grasped.
In measuring a size of a resist pattern, a scanning electron microscope which executes a program for detecting a size measuring pattern in a length measuring monitor region 51 as described above is used.
In order to steadily manage variation of line width difference of photolithography, not only an isolated pattern and, a line and space (L/S) pattern, but also a repetitive pattern which is closely analogous to the circuit pattern is sometimes formed in the length measuring monitor region 51.
However, in a conventional manufacturing method of a semiconductor device, it is difficult to detect the size measuring pattern in the length measuring monitor region 51 quickly and to measure the size. Therefore, while searching the size measuring pattern, a resist pattern is irradiated with an electron beam a lot. Therefore, when endurance of the resist pattern against the electron beam is low, shrinkage and deformation of the resist pattern occur. Especially in an ArF chemically amplified resist suitable for microfabrication in recent years, this tendency is large. As microfabrication is advanced, influence of shrinkage and deformation of the resist pattern become large, and only the deformation of about 2 to 3 nm cannot be allowed in recent years.
For example, in order to perform length measurement, focus has to be achieved after a pattern is recognized. If the ArF chemically amplified resist is used in this case, the line width of the length measuring pattern sometimes deforms and shrinks in a range of less than 10 nm when focus is achieved at a length measuring spot under high magnification. When observation is performed at the length measuring spot under low magnification, deformation or the like similarly occurs due to irradiation of an electron beam. Therefore, length measurement with high accuracy becomes difficult. At a spot where the length measurement is performed even once, deformation and shrinkage of the resist pattern has occurred, and therefore, it is difficult to obtain the degree of trimming by performing length measurement at the same spot after etching.
Related arts are disclosed in Japanese Patent No. 3333680, Japanese Patent Application Laid-open No. 2001-85317, WO 00/49367, Japanese Patent No. 2723508, Translated National Publication of Patent Application No. 1997-504142, Japanese Patent Application Laid-open No. 2002-122975, and Japanese Patent Application Laid-open No. 2001-209167.